Chip‐Scale Graphene/IGZO Cold Source FET Array Enabling Sub‐60 mV dec <sup>−1</sup> Super‐Steep Subthreshold Swing (Adv. Mater. 7/2026)
Article Details
Authors (14)
Seyoung Oh
Department of Advanced Materials Engineering Chungbuk National University Chungdae‐ro 1, Seowon‐Gu Cheongju Chungbuk 28644 Republic of Korea
Ojun Kwon
Department of Advanced Materials Engineering Chungbuk National University Chungdae‐ro 1, Seowon‐Gu Cheongju Chungbuk 28644 Republic of Korea
Jongwon Yoon
Eunjeong Cho
Min Jeong Kim
Wondeok Seo
Department of Advanced Materials Engineering Chungbuk National University Chungdae‐ro 1, Seowon‐Gu Cheongju Chungbuk 28644 Republic of Korea
MinHee Kim
Shinhoi Kim
Department of Advanced Materials Engineering Chungbuk National University Chungdae‐ro 1, Seowon‐Gu Cheongju Chungbuk 28644 Republic of Korea
Yeongeun Kwon
Department of Advanced Materials Engineering Chungbuk National University Chungdae‐ro 1, Seowon‐Gu Cheongju Chungbuk 28644 Republic of Korea
Yung Joon Jung
Department of Mechanical and Industrial Engineering Northeastern University Boston MA 02115 USA
Kyungrok Kang
DRAM Yield Enhancement Team Samsung Electronics 1‐1, Samsungjeonja‐ro Hwasung‐City Gyeonggi‐do 18448 Republic of Korea
Woojin Park
Yonghun Kim
Byungjin Cho
Department of Advanced Materials Engineering Chungbuk National University Chungdae‐ro 1, Seowon‐Gu Cheongju Chungbuk 28644 Republic of Korea