High‐Performance Polymer Monolayer Transistors with Sub‐20 nm Channel Lengths

M Mengmeng Li J Jiebin Niu X Xufan Li Y Yue Tian C Chenming Ding (State Key Laboratory of Fabrication Technologies for Integrated Circuits Institute of Microelectronics Chinese Academy of Sciences Beijing 100029 P. R. China) C Congyan Lu Z Zhenzhong Yang (Key Laboratory of Polar Materials and Devices (MOE), Department of Electronics, School of Information and Electronic Engineering) R Rong Huang L Lingfei Wang H He Yan L Ling Li M Ming Liu

Abstract

Abstract The scaling strategy is widely used to achieve much improved performance and reduced cost in a single chip with more devices for field‐effect transistors (FETs) based on Si and state‐of‐the‐art 2D materials. However, the downscaling of polymer FETs with high performance has not been achieved. Here both the body thickness scaling and channel length scaling strategies are employed, and demonstrate a 2.4‐nm‐thick polymer monolayer FET, where the shortest channel length ( L ) of 18 nm is achieved that is comparable to the smallest technology node (≈20 nm) for planar Si FETs. Such short‐channel FETs, with good operational stability and reliability, exhibit only slightly lower field‐effect mobility than the device with micrometer‐long channel, but the on‐state current density reaches 2.4 × 10 −4 A µm −1 . More importantly, a high intrinsic gate delay of 0.79 ps is achieved, while maintaining the on/off current ratio up to 10 9 . Additionally, by increasing the thickness of gate dielectric a remarkable short channel effect is observed, which is in excellent agreement with natural scale length evaluated by the Scale Length Theory.

Article Details

Volume / Issue Vol. 37, Issue 28
Published July 01, 2025
ISSN 0935-9648
Publisher Unknown Publisher

Journal Info

Advanced Materials

Unknown Publisher

ISSN: 0935-9648 Physical Sciences

Authors (12)

M

Mengmeng Li

J

Jiebin Niu

X

Xufan Li

Y

Yue Tian

C

Chenming Ding

State Key Laboratory of Fabrication Technologies for Integrated Circuits Institute of Microelectronics Chinese Academy of Sciences Beijing 100029 P. R. China

C

Congyan Lu

Z

Zhenzhong Yang

Key Laboratory of Polar Materials and Devices (MOE), Department of Electronics, School of Information and Electronic Engineering

R

Rong Huang

L

Lingfei Wang

H

He Yan

L

Ling Li

M

Ming Liu