Patterning of Lead Halide Perovskite Device Stacks on CMOS Readout Using Selective Microfabrication Protocols

Abstract

ABSTRACT Lead halide perovskites represent a promising class of semiconductor materials, notable for their unique optoelectronic properties. However, their application in advanced semiconductor devices, such as CMOS image sensors, photonic integrated circuits, and memristors, requires the development of precise, perovskite‐specific patterning processes compatible with standard cleanroom fabrication. Here, we introduce several key innovations enabling standard microfabrication with lead halide perovskites. First, surface passivation with sorbitan laurate effectively seals the perovskite grain boundaries, enabling the use of standard photoresists (e.g., AZ1518) and aqueous developers on complete device stacks. Furthermore, a modified phosphoric acid etchant, incorporating phenylbutylammonium bromide (PBABr), facilitates the selective etching of transparent conductive oxides (TCOs) such as ITO directly atop the perovskite stack without significant degradation of the active layer. Finally, SF 6 plasma treatment, using the patterned TCO as a hard mask, selectively converts perovskite in the interpixel gaps into non‐photoactive PbF x Br 2‐x , effectively suppressing lateral cross‐talk. Utilizing this integrated fabrication strategy, we successfully fabricated and characterized a 400 × 400 pixel perovskite CMOS image sensor, where the well‐defined pixels are essential for high spatial resolution and sensor performance. Our results establish a pathway for the development of high‐performance (opto)electronic devices based on lead halide perovskites integrated via standard semiconductor processing methods.