Scalable Van Der Waals Integration of III‐N Devices Over 2D Materials for CMOS‐Compatible Architectures
Abstract
AbstractAdvances in semiconductor technology have been primarily driven by exponentially reducing the size of silicon transistors and pushing the quantum limit. However, continued scaling becomes extremely difficult in accordance with Moore's law. Conversely, recent advances in monolithic and heterogeneous integration by exploring non‐group IV materials envision beyond CMOS scaling. This study entails the development of scalable van der Waals (vdW) integration technology by using all CMOS back‐end‐of‐line‐compatible processes: vertical 3D and lateral 2D integration of III‐N devices, 2D materials (graphene and molybdenum disulfide), and CMOS. Advanced fluidic‐assisted self‐alignment transfer (FAST) provides a process accuracy of ≈ 32.6 nm as analyzed on a 200 mm wafer scale. The freestanding III‐N chips are vdW integrated onto 2D materials, and the vdW interfaced multi‐layer graphene successfully functioned as a back‐gating interconnect line. Moreover, fidelity of the vdW interface is confirmed by conducting systematic yield, uniformity, and reliability analysis. The unique fourfold rotationally symmetric design of GaN transistors makes them compatible with massive and random FAST processing. GaN‐based radio‐frequency power and cascode GaN/Si transistors are integrated on silicon‐on‐insulator‐CMOS. The proposed approach affords a remarkable advantage by surpassing the physical limits and facilitating functional diversification, thus advancing the concept of “More than Moore.”
Article Details
Authors (25)
Gyuhyung Lee
Department of Intelligent Semiconductor Soongsil University Seoul 06938 South Korea
Youngtek Oh
Samsung Advanced Institute of Technology Suwon 16678 South Korea
Junsik Hwang
Samsung Advanced Institute of Technology Suwon 16678 South Korea
Seog Woo Hong
Samsung Advanced Institute of Technology Suwon 16678 South Korea
Sanghoon Song
Linac Coherent Light Source, SLAC National Accelerator Laboratory, 2575 Sand Hill Road, Menlo Park, California 94025, United States
Keun Wook Shin
Samsung Advanced Institute of Technology Suwon 16678 South Korea
Jaeyong Lee
Department of Chemistry
Sisung Yoon
Department of Intelligent Semiconductor Soongsil University Seoul 06938 South Korea
Dong Kyun Kim
Samsung Advanced Institute of Technology Suwon 16678 South Korea
Hyun‐Joon Kim‐Lee
Samsung Advanced Institute of Technology Suwon 16678 South Korea
Dongho Kim
Spectroscopy Laboratory for Functional π-Electronic Systems and Department of Chemistry
Joosung Kim
Dong‐Chul Shin
Samsung Advanced Institute of Technology Suwon 16678 South Korea
Min‐chul Yu
Samsung Advanced Institute of Technology Suwon 16678 South Korea
Jinyeong Lee
School of Information and Communication Engineering Chungbuk National University Cheongju Chungbuk 28644 South Korea
Joon‐Yong Park
Samsung Advanced Institute of Technology Suwon 16678 South Korea
Hyun Mi Lee
Samsung Advanced Institute of Technology Suwon 16678 South Korea
Sang Won Kim
Samsung Advanced Institute of Technology Suwon 16678 South Korea
Byunghoon Na
Samsung Advanced Institute of Technology Suwon 16678 South Korea
Seokho Yun
Yongsung Kim
Jaewook Jeong
Changkun Park
Kyungwook Hwang
Samsung Advanced Institute of Technology Suwon 16678 South Korea
Geonwook Yoo